Condor Currents

Condor Computing

Condor Currents delivers concise breakdowns of the latest computer architecture research and RISC-V developments. Each episode covers recent arXiv papers on data prefetching, branch prediction, and microarchitecture innovations, plus news from the open silicon community. Brought to you by Condor Computing, high-performance RISC-V processor IP from Andes Technology.

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Yesterday · length unknown
PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving
## Episode Summary In this episode, we cover: - **PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving** (arXiv) - **Understanding and Exploiting Diagonal Attention Sparsity in Autoregressive Image Generation** (arXiv) - **Checking In On The ISA Wars And Its Impact On CPU Architectures - Hackaday** (google_arch) - **Kari Hepola: Custom tools make RISC-V processors faster and easier to design - tuni.fi** (google_riscv) - **Enabling Comprehensive CWE-based Assurance for RISC-V Processors - semiengineering.com** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
Friday · length unknown
RISC-V and machine learning: a survey
## Episode Summary In this episode, we cover: - **RISC-V and machine learning: a survey** (arXiv) - **MeshKV: A Network-on-Chip KV Cache Fabric for Scalable Transformer Decoding Accelerators** (arXiv) - **QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - computer.org** (google_arch) - **nRF54LC10A SoC features Cortex-M33, RISC-V coprocessor, Bluetooth LE, Thread and Zigbee - LinuxGizmos.com** (google_riscv) - **SpacemiT to launch server-class RISC-V processor following capital injection - South China Morning Post** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
Thursday · length unknown
Quantifying the Effect of HCLs on a Fixed-Microarchitecture MXFP4 Accelerator
## Episode Summary In this episode, we cover: - **Quantifying the Effect of HCLs on a Fixed-Microarchitecture MXFP4 Accelerator** (arXiv) - **HBFlex: A Flexible Memory System for Bridging Fine-Grained LLM States and Coarse-Grained HBF Parallel Execution** (arXiv) - **Design of a low-power RISC-V based intelligent endoscopy detection processor: EndoRISC-V - nature.com** (google_riscv) - **Enabling Comprehensive CWE-based Assurance for RISC-V Processors - Semiconductor Engineering** (google_riscv) - **Armaan Gomes and Friends Deliver Playable Doom on a Whole New Platform: A Custom RISC-V CPU - Hackster.io** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
Wednesday · length unknown
The World Model Hardware Accelerator
## Episode Summary In this episode, we cover: - **The World Model Hardware Accelerator** (arXiv) - **A 25-$μ$s/inf Event-driven Graph Neural Network Processor with Spatiotemporal Caching and Spline Convolution for Ultra-low-latency AI at the Edge** (arXiv) - **Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX - Phoronix** (google_riscv) - **China's LineShine tops supercomputer ranking with all-CPU architecture - chinadaily.com.cn** (google_arch) - **Your Nvidia GPU has dozens of RISC-V cores inside it, and one of them took over a huge part of the graphics driver - XDA** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
Tuesday · length unknown
BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inference
## Episode Summary In this episode, we cover: - **BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inference** (arXiv) - **Arborist: Algorithm-Hardware Co-Design for Fast and Efficient Motion Planning** (arXiv) - **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - Business Wire** (google_riscv) - **SiFive RISC-V is an Open-Source Processor! - ServeTheHome** (google_riscv) - **RISC-V Processor Advances Local Chip Design - Open Source For You** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 13 · length unknown
India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - theregister.com
## Episode Summary In this episode, we cover: - **India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - theregister.com** (google_riscv) - **RISC-V CPU Performance Up 8x In Five Years: SiFive HiFive Unmatched To SpacemiT K3 - Phoronix** (google_riscv) - **Prompt to tape out: Autonomous AI agent builds 1.5 GHz RISC-V CPU - Adafruit** (google_riscv) - **Openchip unveils BER10 RISC-V processor as Europe pursues greater digital sovereignty - New Electronics** (google_riscv) - **StarFive Dubhe-100 – A 64-bit, RVA23-compliant RISC-V core for high-performance applications - CNX Software** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 12 · length unknown
Enabling High-Bandwidth Flash for Generative Recommendation Serving with Write-Aware KV Cache Policy
## Episode Summary In this episode, we cover: - **Enabling High-Bandwidth Flash for Generative Recommendation Serving with Write-Aware KV Cache Policy** (arXiv) - **Sharing a Fabric with Collective Communication: Two Storage Penalties in Deep Learning Training** (arXiv) - **RISC-V extensions for high performance embedded computing ... - eenewseurope.com** (google_riscv) - **China's LineShine tops supercomputer ranking with all-CPU architecture - China Daily** (google_arch) - **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - techpowerup.com** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 11 · length unknown
HermiCache: Enclave-Aware Cache Replacement for Trusted Execution Environments
## Episode Summary In this episode, we cover: - **HermiCache: Enclave-Aware Cache Replacement for Trusted Execution Environments** (arXiv) - **Fengshui: Demystifying Chiplet Ecosystem and Bespoke Neural Network Accelerator Codesign** (arXiv) - **The key CPU architecture you've never heard of: RISC-V - Red Shark News** (google_arch) - **For Automakers, RISC-V Isn’t Just About Ownership: It’s About Freedom of Choice** (riscv_news) - **Design of a low-power RISC-V based intelligent endoscopy detection processor: EndoRISC-V - Nature** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 10 · length unknown
Performance aware shared memory hierarchy model for multicore processors - nature.com
## Episode Summary In this episode, we cover: - **Performance aware shared memory hierarchy model for multicore processors - nature.com** (google_arch) - **India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - The Register** (google_riscv) - **Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board - CNX Software** (google_riscv) - **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - TechPowerUp** (google_riscv) - **PoCL 7.2 Released With Official OpenCL 3.0 Conformance On RISC-V & x86_64 CPUs - Phoronix** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 9 · length unknown
RAGMark: A Comprehensive Framework for Benchmarking Retrieval-Augmented Generation Systems
## Episode Summary In this episode, we cover: - **RAGMark: A Comprehensive Framework for Benchmarking Retrieval-Augmented Generation Systems** (arXiv) - **AutoUVM: Automated Prefetching Framework for LLMs under UVM Oversubscription** (arXiv) - **RISC-V: The Open-Source Revolution in CPU Architecture - Design And Reuse** (google_arch) - **RISC-V extensions for high performance embedded computing ... - eeNews Europe** (google_riscv) - **How Did An AI Agent Build a RISC V CPU Core In Just 12 Hours - IEEE Spectrum** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 8 · length unknown
GreenPipe: Power Modeling for Containerized DNN Inference on Kubernetes Edge Nodes
## Episode Summary In this episode, we cover: - **GreenPipe: Power Modeling for Containerized DNN Inference on Kubernetes Edge Nodes** (arXiv) - **A Time-Encoded Analog Photonic Interposer for Energy-EfficientIntegration of Analog Vision Sensors and Analog Accelerators** (arXiv) - **The RISC-V Vector Extensions for AI - Jon Peddie Research** (google_riscv) - **AheadComputing Inc. Raises Additional $30M Seed2 Round to Reimagine CPU Architecture - hpcwire.com** (google_arch) - **AheadComputing Introduces Breakthrough CPU Architecture for General-Purpose Computing, With Jim Keller on Board - techpowerup.com** (google_arch) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 7 · length unknown
Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor
## Episode Summary In this episode, we cover: - **Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor** (arXiv) - **Quality Recovery for Quantized KV Caches via Low-Rank Attention Adaptation** (arXiv) - **AheadComputing Inc. Raises Additional $30M Seed2 Round to Reimagine CPU Architecture - HPCwire** (google_arch) - **AheadComputing Introduces Breakthrough CPU Architecture for General-Purpose Computing, With Jim Keller on Board - TechPowerUp** (google_arch) - **Deja Vu: A Brief History of Every Mac CPU Architecture - How-To Geek** (google_arch) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 6 · length unknown
A single-precision floating-point systolic Givens-QRD Triangular Solver for MVDR Beamforming
## Episode Summary In this episode, we cover: - **A single-precision floating-point systolic Givens-QRD Triangular Solver for MVDR Beamforming** (arXiv) - **FFSlim: An Efficient and Lightweight Format for Multi-modal Data Storage and Retrieval** (arXiv) - **QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - IEEE Computer Society** (google_arch) - **Performance aware shared memory hierarchy model for multicore processors - Nature** (google_arch) - **Bit-Brick K1: Raspberry Pi 5 alternative with different CPU architecture, M.2 and PCIe support launches - Notebookcheck** (google_arch) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 5 · length unknown
Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor
## Episode Summary In this episode, we cover: - **Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor** (arXiv) - **Para-Pipe: Exploiting Hierarchical Operator Parallelism of ML Computational Graphs on SoCs** (arXiv) - **RISC-V: The Open-Source Revolution in CPU Architecture - design-reuse.com** (google_arch) - **The Evolution of CPU Architectures – From Intel 4004 To Modern SoCs - wccftech.com** (google_arch) - **RISC-V vs ARM: Which Instruction Set Architecture Will Dominate the Future? - Electropages** (google_arch) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 4 · length unknown
The key CPU architecture you've never heard of: RISC-V - redsharknews.com
## Episode Summary In this episode, we cover: - **The key CPU architecture you've never heard of: RISC-V - redsharknews.com** (google_arch) - **Checking In On The ISA Wars And Its Impact On CPU Architectures - hackaday.com** (google_arch) - **Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX - phoronix.com** (google_riscv) - **RISC-V Targets Data Centers as Open ISA Pushes Beyond Embedded Systems - EE Times Asia** (google_riscv) - **Migration Using Context Cache for Multicore RISC‐V Processor - Wiley Online Library** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 3 · length unknown
SchedBlame: Who Ran While You Waited? Culprit-Attributed CPU Contention for Containers on Stock Kernels
## Episode Summary In this episode, we cover: - **SchedBlame: Who Ran While You Waited? Culprit-Attributed CPU Contention for Containers on Stock Kernels** (arXiv) - **HBQ: Hierarchical Scaling Block Quantization with Hardware-Efficiency-Aware Design for Accurate LLM Inference** (arXiv) - **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - techpowerup.com** (google_riscv) - **Ultra-compact mini PC from Japanese maker packs 8-core RISC-V CPU and up to 32 GB RAM - Notebookcheck** (google_riscv) - **Codasip Shifts Focus to Cyber-Resilient SoCs, Divests Low-End RISC-V Business - Embedded Computing Design** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 2 · length unknown
Performance Characterization of SPEC CPU 2026 on AMD EPYC 9755 Processor
## Episode Summary In this episode, we cover: - **Performance Characterization of SPEC CPU 2026 on AMD EPYC 9755 Processor** (arXiv) - **Hardware Acceleration of Block-Diffusion LLM for Edge Devices** (arXiv) - **Migration Using Context Cache for Multicore RISC‐V Processor - onlinelibrary.wiley.com** (google_riscv) - **QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - computer.org** (google_arch) - **A Deep Dive Into CPU Architecture - i-programmer.info** (google_arch) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
September 1 · length unknown
CHIPSMORE: Compute-in-Interconnect and -Memory Chiplets for Multi-Mode Multi-Request LLM Inference Acceleration
## Episode Summary In this episode, we cover: - **CHIPSMORE: Compute-in-Interconnect and -Memory Chiplets for Multi-Mode Multi-Request LLM Inference Acceleration** (arXiv) - **Scalable AXI4 Transaction Monitoring for Mixed-Criticality SoCs: From Phase-Level Precision to ID-Level Efficiency** (arXiv) - **Checking In On The ISA Wars And Its Impact On CPU Architectures - Hackaday** (google_arch) - **The Evolution of CPU Architectures – From Intel 4004 To Modern SoCs - Wccftech** (google_arch) - **RISC-V vs ARM: Which Instruction Set Architecture Will Dominate the Future? - electropages.com** (google_arch) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
August 31 · length unknown
Great Expectations: Benchmarking the Real-World Performance of RVV 1.0 in HPC
## Episode Summary In this episode, we cover: - **Great Expectations: Benchmarking the Real-World Performance of RVV 1.0 in HPC** (arXiv) - **AI Hardware Accelerators for Large Language Models: Architectures and the Memory Wall** (arXiv) - **Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX - Phoronix** (google_riscv) - **RISC-V Soft Processor System on DE10-Lite - Hackster.io** (google_riscv) - **The next RISC-V processor frontier: AI - EDN - Voice of the Engineer** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
August 30 · length unknown
NOVA: Technology-Architecture Co-Design of Near-Memory Processing for Attention-SSM-MoE Hybrid LLM Inference
## Episode Summary In this episode, we cover: - **NOVA: Technology-Architecture Co-Design of Near-Memory Processing for Attention-SSM-MoE Hybrid LLM Inference** (arXiv) - **Performance Foundations of Parallel & Distributed Reasoning Language Models** (arXiv) - **Nvidia Vera CPU Architecture: Max single-threaded CPU at scale for agents - GamesBeat** (google_arch) - **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - Business Wire** (google_riscv) - **NextSilicon to Productize Arbel RISC-V Core into 64-Core Enterprise Processor for AI and HPC - HPCwire** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*

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